Question: Draw and explain the instruction template format of 8086.
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Mumbai University > Electronics and Telecommunication > Sem 4 > Microprocessor and peripherals

Marks: 10M, 5M

Year: May 2014, Dec 2014

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modified 2.4 years ago  • written 2.4 years ago by gravatar for Juilee Juilee ♦♦ 2.1k
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  1. The 8086 instruction sizes vary from one to six bytes. Depending on the type of coding, an instruction may have more than one hex code.
  2. Figure below shows the instruction format of 8086:

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  1. The first six bits of a multi byte instruction generally contains an opcode that identifies the basic instruction type i.e. ADD, XOR etc.
  2. The following bit called the D field generally specifies the direction of the operation. D = 1 means instruction source is specified in REG field. D = 0 means instruction destination is specified in REG field.
  3. The next following bit is W. This bit identifies between byte and word operation. W = 0 instruction operates on byte data. W = 1 instruction operates on word data.
  4. In some case in 2nd byte we have MOD, OPCODE and R/M and for some of the cases we have MOD, REG and R/M. First, OPCODE bits in 2nd byte of instruction format. This field is 3 bit wide. Under that we have three single bit fields S, V and Z.
  5. S bit:
  • An 8 bit 2’s complement number can be extended to a 16 bit 2’s complement number by letting all of the bits in high order byte equal the MSB in low order byte. This is referred to as sign extension.
  • S bit is used in conjunction with W to indicate sign extension of immediate fields in arithmetic instructions.

    S = 0 No sign extension

    S = 1 Sign extended 8 bit immediate data to 16 bits if W = 1

    Therefore for 8 bit operation S = W = 0

    16 bit operation with a 16 bit immediate operand S = 0, W = 1

    16 bit operation with a sign extended 8 bit immediate operand S = W =1

  1. V bit:

    Used by shift and rotate to determine single and variable bit shifts and rotate.

    V = 0 shift/rotate count is one

    V = 1 shift/rotate count is specified in CL register

  2. Z bit:

    This bit is used as a compare bit with zero flag in conditional repeat (REP) and loop instructions.

    Z = 0 repeat/loop while zero flag is clear

    Z = 1 repeat/loop while zero flag is set

  3. MOD:

  • The mode (MOD) field indicates whether one of the operands is in memory or whether both operands are register.
  • Table below shows MOD field encoding, this field is of size 2 bits
CODE EXPLANATION
0 0 Memory mode, no displacement follows*
0 1 Memory mode, 8 bit displacement follows
1 0 Memory mode, 16 bit displacement follows
1 1 Register mode (No displacement)
  • Except when R/M = 110, then 16 bit displacement follows. As seen MOD is basically concerned with displacement i.e. 8 bit or 16 bit or no displacement

11.REG:

The register (REG) field identifies a register that is one of the instruction operands. REG field depends upon W bit.

Table below shows the selection of registers depending upon W bit.

REG W = 0 W = 1
0 0 0 AL AX
0 0 1 CL CX
0 1 0 DL DX
0 1 1 BL BX
1 0 0 AH SP
1 0 1 CH BP
1 1 0 DH SI
1 1 1 BH DI

When W = 0, all 8 bit registers are selected whereas for W = 1 all 16 bit registers are selected.

Thus in a number of instructions and mainly in immediate to memory variety, REG is used as an extension of the OPCODE to identify the type of operation i.e. 8 bit or 16 bit.

  1. R/M:

    This field is of 3 bits. The meaning of R/M bits changes depending upon mode (MOD) field.

    Case I: Register to register transfer In this operation, data movement is within the register either 8 bit or 16 bit. As mentioned in this operation, REG field identifies one of the instruction operands. The other instruction operand is specified by R/M, W and MOD bits. R/M field encoding when MOD = 11 (binary)

R/M W = 0 W = 1 .
0 0 0 AL AX
0 0 1 CL CX
0 1 0 DL DX
0 1 1 BL BX
1 0 0 AH SP
1 0 1 CH BP
1 1 0 DH SI
1 1 1 BH DI

Case II: Memory mode (8 bit/16 bit or no displacement) When MOD selects memory mode (MOD = 00 or 01 or 10) then data transfer is register to/from memory. In that case R/M field indicates how the effective address of the memory operand is to be calculated.

Effective Address calculation

R/M MOD = 00 MOD = 01 MOD = 10
000 (BX) + (SI) (BX) + (SI) + D8 (BX) + (SI) + D16
001 (BX) + (DI) (BX) + (DI) + D8 (BX) + (DI) + D16
010 (BP) + (SI) (BP) + (SI) + D8 (BP) + (SI) + D16
011 (BP) + (DI) (BP) + (DI) + D8 (BP) + (DI) + D16
100 (SI) (SI) + D8 (SI) + D16
101 (DI) (DI) + D8 (DI) + D16
110 DIRECT ADDRESS (BP) + D8 (BP) + D16
111 (BX) (BX) + D8 (BX) + D16

$\hspace{1cm}$ D8 = 8 bit displacement $\hspace{1cm}$ D16 = 16 bit displacement

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