Question Paper: Digital Logic Design & Analysis : Question Paper Dec 2014 - Computer Engineering (Semester 3) | Mumbai University (MU)
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## Digital Logic Design & Analysis - Dec 2014

### Computer Engineering (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks.
1 (a) Represent (29)10 into Excess-3 code and Gray code.(2 marks) 1 (b) Convert the following hex no. (67.4A)16 into equivalent Octal no.(2 marks) 1 (c) Convert decimal (215.32) into base '7'.(4 marks) 1 (d) Convert (670.17)8 into binary and hex.(4 marks) 1 (e) Add (57)10 and (26)10 in BCD(2 marks) 1 (f) Explain uses of Gray code.(4 marks) 1 (g) Add (DDCC)16 and (BBAA)16.(2 marks) 2 (a) (i) State the boolean algebra laws used in k-map simplification.
(ii) Simplify $$Y=ABC(\overline{CD})+ \overline{B}CD+ (\overline{A}\overline{C})(B+D).\lt/span\gt\ltspan class='paper-ques-marks'\gt(10 marks)\lt/span\gt \lt/span\gt\ltspan class='paper-question'\gt\ltspan class='paper-ques-desc'\gt\ltb\gt2 (b)\lt/b\gt A misquided mathematician would like to substract term. A\ltspan style="text-decoration:overline"\gtC \lt/span\gt from both sides of equality. \ltbr\gt BC+ABD+A\ltspan style="text-decoration:overline"\gtC \lt/span\gt= BC+A\ltspan style="text-decoration:overline"\gtC \lt/span\gt \ltbr\gt Would they still be equal if he did so. Justify and simplify the expression.$$F= (x+\overline{z}) (\overline{Z+WY})+ (VZ+W\overline{x})(\overline{Y}+ \overline{Z}) $$\lt/span\gt\ltspan class='paper-ques-marks'\gt(10 marks)\lt/span\gt \lt/span\gt\ltspan class='paper-question'\gt\ltspan class='paper-ques-desc'\gt\ltb\gt3 (a)\lt/b\gt Simplify using boolean theorems and implement usign AOI gate only.$$i) \overline {\overline{AB+ \overline A \overline B}+ \overline {(A+B)\cdot (\overline{A}+\overline{B})}}  ii) Implement the following expression using NAND-NAND logic y=?m(0,1,5)
(10 marks)
3 (b) Simplify using k-map obtain SOP equation and realize using NAND gate. f(A,B,C,D)=ΠM (1,2,3,8,9,10,11,14)+ d(7,15).(10 marks) 4 (a) Implement the following expression using 8:1 mux
f(A,B,C,D)=πm(0,1,3,5,7,10,11,13,14,15).
(4 marks)
4 (b) Explain with example 4 bit BCD adder using IC-7483.(8 marks) 4 (c) Compare the performance of ITL, CMOS and ECL logic.(8 marks) 5 (a) What is shift register? Explain 4 bit bi-directional shift register.(10 marks) 5 (b) Convert JK FF to SR and DFF.(10 marks)

### Write short note on (any three):

6 (a) State table(7 marks) 6 (b) VHDL(7 marks) 6 (c) Difference between CPLD and FPGA(7 marks) 6 (d) Decade counters.(7 marks)

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