Question Paper: Analog Electronics - 1 : Question Paper May 2015 - Electronics & Telecomm. (Semester 3) | Mumbai University (MU)
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Analog Electronics - 1 - May 2015

Electronics & Telecomm. (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks.


1 (a) Compare clipper and clamper circuit. (5 marks)


1 (b) Explain Barkhausen criteria for sustained oscillations. (5 marks)


1 (c) Compare Depletion and Enhancement type MOSFET. (5 marks)


1 (d) Transistor is a current controlled device while FET is a voltage controlled device. Justify. (5 marks)


2 (a) Define Stability factor. Derive the equation for stability factor. State which biasing technique is more stable. Justify your answer. (10 marks)


2 (b) For a NPN transistor in CE mode voltage divider bias configuration determine VC and VB-. Given VCC=+20V, VEE=-20V, R1=8.2 KkΩ, R2=2.2KΩ, RC=2.7 KΩ, RE=1.8 KΩ, C1=C2=10 7mu;F and β=120. (10 marks)


3 (a) Derive the equations for Av, Ai, Ri and Ro for a NPN transistor in CE mode voltage divider bias configuration with RE unbypassed. (10 marks)


3 (b) For the network given below determine Zi, Zo and Av. (10 marks)


4 (a) Explain the basic operation and characteristics of n-channel enhancement type of MOSFET. (10 marks)


4 (b) Draw a neat circuit diagram of wien bridge oscillator and derive an expression for its output frequency, (10 marks)


5 (a) Determine IDQ, VGSQ VD & VS for the network given below: (10 marks)


5 (b) Determine Zi Zo & Av for the circuit given below: (10 marks)


Write short note on any four:

6 (a) Biasing of JFET for Zero temperature drift. (5 marks)


6 (b) Energy band diagram of MOS capacitor. (5 marks)


6 (c) Small signal equivalent circuit of CC amplifier. (5 marks)


6 (d) Crystal oscillator. (5 marks)


6 (e) DC load line & significance of Q point. (5 marks)

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