Digital Electronics - May 2012

Electronics & Telecomm. (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 1 (a) Calculate (-6)₁₀-(-2)₁₀ using 2's complement method(5 marks) 1 (b) What is difference between combinational circuit and sequential sircuit?(5 marks) 1 (c) Explain in brief 'state table' and 'state graphs'(5 marks) 1 (d) What are salient features of CMOS logic family?(5 marks) 2 (a) Design a mod 6 ripple counter using T type flip-flop. Draw the circuit designed and output waeforms(12 marks) 2 (b) What is FPGA? What are salient features?(8 marks) 3 (a) Design a full adder using 2 half adders. Explain its working(10 marks) 3 (b) Minimize y=Σm (1,5,7,9,11,13,15) and realise using universal gates(10 marks) 4 (a) Minimize the following function using Quine McCluskey method:
f(A,B,C,D)=Πm(2,7,8,9,10,12)(12 marks) 4 (b) Design a full adder using two 4:1 mux(8 marks) 5 (a) Convert (0.42)₁₀ into binary(4 marks) 5 (b) Solve 111110.1 ÷ 0101 (4 marks) 5 (c) Convert (11011)₂ into gray code(4 marks) 5 (d) List various characteristics of digital IC_s and explain their significance in brief.(8 marks) 6 (a) Design a 4 bit universal shift register and explain its working(12 marks) 6 (b) Implement the following boolean expression using 8:1 mux
$$f\left(A,B,C,D\right)=\bar{A}\ \bar{B}\bar{C}+ABC+\bar{B}CD+\bar{A}CD$$ (8 marks) 7 (a) Design a 3 bit up/down ripple counter.(10 marks) 7 (b) What is half subtractor? Explain its working(10 marks)