Question Paper: Embedded System & Real Time Programming : Question Paper May 2015 - Electronics Engineering (Semester 8) | Mumbai University (MU)
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Embedded System & Real Time Programming - May 2015

Electronics Engineering (Semester 8)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks.
1 (a) Explain low power modes of MSP430 with the help of clock modules.(5 marks) 1 (b) What are the challenges in meeting various design metric/requirements. Explain for:
i) Low power
ii) High performance
(5 marks)
1 (c) Explain serial communication SCI & SPI, compare the same.(5 marks) 1 (d) Compare various scheduling policies.(5 marks) 2 (a) Explain parallel peripherals of MSP430.(10 marks) 2 (b) Explain CAN features and protocols.(10 marks) 3 (a) Explain various modifiers and their purpose and use in an embedded system.(10 marks) 3 (b) Compare assembly language programming with c-programming.(5 marks) 3 (c) Compare ARM state with THUMB state.(5 marks) 4 (a) Explain interrupt/exceptions and its handling in ARM.(5 marks) 4 (b) With the help of suitable diagram give difference between RS485 and RS232, also compare its characteristics, features.(10 marks) 4 (c) Compare, explain various operating modes of ARM.(5 marks) 5 (a) In a real time having periodic Tasks T1, T2, T3 and aperiodic task T4 all requesting at time t=0 having following properties.
i) Calculate utilisation ratios and hence comment on scheduling.
ii) Graphically illustrate the scheduling scheme
iii) Determine if the tasks can meet deadlines.

Task Period Execution Time Deadline

T1

T2

T3

T4

210

70

140

aperiodic

70

21

28

80

210

70

140

420

(10 marks) 5 (b) Explain and compare priority inversion problems and suggest solution to convert unbounded priority inversion to bounded priority inversion.(10 marks) 6 Design an access control system using finger scan. Stored finger scan database is on remote server, the system should be control access: by raising alarm on multiple failure opening door on successful match. For the above design.
i) Develop and draw functional model using FSM.
ii) Develop and draw block diagram representing hardware modules/blocks.
iii) Suggest list of components with proper justification for the selection (from several options available)
(20 marks)


Write short notes on any three:

7 (a) Black box and white box testing.(7 marks) 7 (b) Comparison between ASIC and SOC.(7 marks) 7 (c) Preprocessor directives.(7 marks) 7 (d) Pre-emptive and non pre-emptive scheduling comparison.(7 marks)

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