Computer Organization - May 2015
Electronics Engineering (Semester 6)
TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 1 (a) Write microinstructions for executing instruction Add, Ro, [R3] in there bus architecture processor.(5 marks) 1 (b) Write a note on nanoprogramming.(5 marks) 1 (c) Differentiate SRAM and DRAM.(5 marks) 1 (d) What is parallel processing?(5 marks) 2 (a) Draw flowchart for non-restoring division. Solve (8)+(3) using non-restoring division method.(10 marks) 2 (b) Differentiate between Horizontal and vertical micro architecture.(10 marks) 3 (a) Consider main memory size is three pages. Following page address trace is generated by execution of a program
2 3 2 1 5 2 4 5 3 2
Assume main memory is cleared initially. Find page hit ratio by
i) FIFO ii) LRU replacement scheme.(10 marks) 3 (b) What is microprogramming? Draw and explain microprogrammed control unit.(10 marks) 4 (a) What is virtual memory? How paging is useful in implementing virtual memory?(10 marks) 4 (b) State the advancements in arithmetic and logical instructions supported by IA-32 architecture. Describe five floating point arithmetic instructions in IA-32.(10 marks) 5 (a) Explain various DMA transfer modes in brief with examples.(10 marks) 5 (b) Explain various types of hazards in pipelined processors with example. Also propose solution for each type.(10 marks) 6 (a) What are different I/O access methods? Explain in detail.(10 marks) 6 (b) Write short notes on:
i) Cache coherency
ii) RISC and CISC architectures.(10 marks)