Computer Organization - Dec 2012
Electronics Engineering (Semester 6)
TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 5 (b) What is virtual memory? Explain Role of paging and segmentation in virtual memory.(10 marks) 6 (a) Explain SPARC processor in detail.(10 marks) 6 (b) What is the difference between pipelining and parallelism? Show that k - stage 10 Pipelined processor has k - times speed up as compared to non - pipelined system.(10 marks)
Write short notes on (< b > any four )
7 (a) Wave Front arrays (5 marks) 7 (b) RAID Memory (5 marks) 7 (c) Static and dynamic data flow computers (5 marks) 7 (d) Systolic Arrays (5 marks) 7 (e) I / O processor and I / O channel (5 marks) 7 (f) Characteristics of two level memories (5 marks) 1 (a) Explain Von Neumann Architecture.(6 marks) 1 (b) Compare Computer Organization and Computer Architecture with example. (4 marks) 1 (c) Explain different Mapping techniques of Cache Memory.(10 marks) 2 (a) Compare and contrast DMA, programmed Input/Output and Interrupt driven Input/Output. (10 marks) 2 (b) Compare SRAM and DRAM.(5 marks) 2 (c) Compare RISC and CISC.(5 marks) 3 (a) Explain design of control unit with respect to Softwired and Hardwired approach.(10 marks) 3 (b) Explain IEEE-754 standard formats to represent floating point numbers.(10 marks) 4 (a) What is cache coherency? Explain different protocols to solve cache coherency. (10 marks) 4 (b) Explain Non-Restoring division algorithm for performing 19/4.(10 marks) 5 (a) Explain multiplication of signed numbers -13*-6 using Booths algorithm.(10 marks)