Question Paper: Integrated Circuits : Question Paper May 2014 - Electronics & Telecomm (Semester 4) | Pune University (PU)
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Integrated Circuits - May 2014

Electronics & Telecom Engineering (Semester 4)

TOTAL MARKS: 100
TOTAL TIME: 3 HOURS
(1) Question 1 is compulsory.
(2) Attempt any four from the remaining questions.
(3) Assume data wherever required.
(4) Figures to the right indicate full marks.


Answer any one question from Q1 and Q2

1 (a) State any four characteristics of an ideal OPAMP?(2 marks) 1 (b) A dual input, balanced-output (DIBO) differential amplifier has following specifications: RCI=RC2=2.2 KΩ, RE=4.7 KΩ, Rin=Rin2=50 Ω, +VCC=10V, -VEE=-10 V, βdc=βac=100 and VBE=0.715V. Calculate
i) ICQ
ii) VCEQ
iii) Voltage gain Ad.
(4 marks)
1 (c) Why frequency compensation is required in OPAMP? Explain dominant pole compensation with circuit? & frequency response.(6 marks) 2 (a) Give the classification of ICs according to number of components per chip?(2 marks) 2 (b) An inverting amplifier using IC741 OPAMP has flat frequency response up to 40 Khz, voltage gain of 10. Find maximum peak ? to peak input voltage to get maximum distortion less output?(4 marks) 2 (c) Why level shifter/ translator is needed in an OPAMP? What are its different types? Explain level shifter with constant current bias using diodes.(6 marks)


Answer any one question from Q3 and Q4

3 (a) Draw an inverting summing amplifier with three inputs? Derive an expression for its output voltage VO= -(Va+Vb+Vc).(6 marks) 3 (b) Draw half wave precision rectifier & explain its operation in brief?(3 marks) 3 (c) Draw an inverting comparator? Using OPAMP with -Ve reference & explain its operation in brief with waveforms?(3 marks) 4 (a) For an inverting Schmitt trigger R1=100Ω R2=56KΩ (where R2 is connected in feedback path). If Vin=1 V(P=P) sine wave and Vs=±15V, calculate: i) VUT & VLT(2 marks) 4 (b) Draw & explain in brief an instrumentation amplifier interfaced with RTD bridge for temperature measurement.(6 marks) 4 (c) Draw & explain in brief a sample & hold circuit with waveforms?(4 marks)


Answer any one question from Q5 and Q6

5 (a) In a V-I converter with grounded load, Vin=5V, R=10KΩ and voltage at non-inverting terminal is 1V. Assuming that OPAMP is initially nulled, Calculate:
i) Load current
ii) The output voltage Vo.
(4 marks)
5 (b) Draw a 2-bit D/A converter with R-2R resistor & explain its operation? State its advantages?(5 marks) 5 (c) Explain various specifications of A/D converter.(4 marks) 6 (a) Draw an I-V converter and derive an expression for its output voltage (Vo)?(4 marks) 6 (b) Draw & explain 2-bit flash type analog to digital converter (ADC).(5 marks) 6 (c) An 8-bit D/A converter has a resolution of 10 mV/bit. Find the analog output voltage for the following digital inputs:
i) 10001010
ii) 00010000
(4 marks)


Answer any one question from Q7 and Q8

7 (a) Draw the block schematic of PLL and explain each block in detail.(7 marks) 7 (b) Design an adjustable voltage regulator using LM317 for following specifications:
Output voltage, Vo=5V to 12V
Output current, Io=1A and R1=240Ω (R1 is connected between O/p terminal & adj terminal).
(4 marks)
7 (c) Explain the following terms:
i) Load regulation
ii) Line regulation
(2 marks)
8 (a) For a PLL 565, the free running frequency is 2.5 Khz, _VCC=+10V, -VEE=-10V. If demodulation capacitor (C2) is 10μF, find lock range & capture range.(4 marks) 8 (b) State application of PLL? Also draw block diagrams of FSK demodulator.(5 marks) 8 (c) Draw & explain a three terminal voltage regulator with current boosting.(4 marks)

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