Computer Organization - May 2014
Electronics & Telecom Engineering (Semester 4)
TOTAL MARKS: 100
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any four from the remaining questions.
(3) Assume data wherever required.
(4) Figures to the right indicate full marks.
Answer any one question from Q1 and Q2
1 (a) Draw and explain the Von Neumann architecture.(6 marks)
1 (b) Represent (178.1875)10 in single precision floating point format.(6 marks)
2 (a) Explain pipeline & superscalar operation.(6 marks)
2 (b) multiply the following numbers using bit pair recoding method
Multiplier 10110 (-10)(6 marks)
Answer any one question from Q3 and Q4
3 (a) Write control sequence for execution of instruction ADD (R1), R2 using single bus organization.(6 marks) 3 (b) Draw and explain the interface between printer and processor.(6 marks) 4 (a) Explain different methods to handle multiple interrupt requests.(6 marks) 4 (b) Explain the steps involved in fetching a word from memory.(6 marks)
Answer any one question from Q5 and Q6
5 (a) Draw and explain the structure of Asynchronous DRAM and hence explain how the data can be read or written in the DRAM.(7 marks) 5 (b) Explain different mapping schemes for cache memory.(6 marks) 6 (a) Explain the concept of virtual memory.Explain how virtual address is translated to physical address.(6 marks) 6 (b) With the help of a neat diagram, explain the working principle of SRAM.(7 marks)
Answer any one question from Q7 and Q8
7 (a) Explain the following instructions of 8086 with suitable example
i) XLAT ii) DAA iii) PUSH iv) IN v) TEST vi) LEA(6 marks) 7 (b) Explain interrupt structure of 8086.(7 marks) 8 (a) Explain the following addressing modes of 8086 with examples
i) String addressing
ii) Based Indexed addressing
iii) Direct addressing.(6 marks) 8 (b) Draw the bit pattern for flag register of 8086 and explain significance of each bit.(7 marks)