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Draw 1 T DRAM cell & explain its write ,read ,hold & refresh operation
written 6.3 years ago by gravatar for hetalgosavi hetalgosavi • 1.6k •   modified 5.1 years ago

Subject: Basic VLSI Design

Topic: Semiconductor Memories

Difficulty: Medium
vlsi design
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written 5.1 years ago by gravatar for hetalgosavi hetalgosavi • 1.6k

READ operation:

  1. Before read operation, DL is charged to VDD/2.
  2. WL is activated and thus M1 turns ON.
  3. If logic 1 is stored at C1, then charge is shared with C2. Therefore there is change in voltage of DL.
  4. Sense amplifier senses this change and generates valid output.
  5. If voltage …

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