Subject: Digital System Design

Topic: Sequential logic design practices

Difficulty: High

The 74LS93 IC is a 4-Bit ripple counter partitioned into two sections.

The counter has a divide-by-two section and a divide-by-eight section.

Each section is triggered by a HIGH-to-LOW transition on the clock inputs.

Each section can be used separately or tied together.

The counters have a 2-input gated master reset (clear).

Limitations:

As with most MSI integrated circuits, the trade-off for the convenience of an all-in-one package is the lack of design flexibility.

This lack of flexibility may lead to limitation or inability to use the IC in certain applications.

The primary limitations of the 74LS93 are:

• The flip-flops are not pre-settable; thus, the count must always start at zero.

• As designed, it can only be used to implement up counts.