written 5.9 years ago by | • modified 2.2 years ago |
Subject: CMOS VLSI Design
Topic: MOS Operational Amplifiers
Difficulty: Medium
written 5.9 years ago by | • modified 2.2 years ago |
Subject: CMOS VLSI Design
Topic: MOS Operational Amplifiers
Difficulty: Medium
written 5.9 years ago by | • modified 5.9 years ago |
Gain and Phase conditions while designing op-amp.
$A_{CL}=\frac{A_{(S)}}{1+A_{(S)}\beta_{(S)}} ,\hspace{2cm}$ loop gain=$-A_{(S)}\beta_{(S)}$
Suppose above system has 2 poles $P_1$ and $P_2$, the Bode plot for mag & phase will have nature as follows,
Assumptions:-
1) $P_1$ comes before $P_2$.
-> $P_2$ comes exactly at G B point. GBWpt is the point which gain=0.
2) $\phi_m$ (PM)
-> angle<-->GBW point (Here $\phi_m=45^0$) i.e minimum phase in design of op-amp should be $45^0$
-> Since, if unwanted pole comes, $\phi_m$ may become 0 before GBW pt and hence condition for -ve F/B will not be satisfied.
3) $G_m$
-> mag<-->$0^0$
-> For opamp, Gm-> -ve i.e phase should not get below $0^0$ before GBW point.