Question Paper: Design with Linear Integrated Circuits Question Paper - December 2014 - Electronics Engineering (Semester 5) - Mumbai University (MU)

Design with Linear Integrated Circuits - December 2014

MU Electronics Engineering (Semester 5)

Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary
1 (a) Design Inverting op-amp circuit for voltage gain 10. What care should be taken to operate it linearly. 4 marks

1 (b) Design a differentiator to differentiate the input signal that varies in frequency from 10 Hz to 1 KHz. 4 marks

1 (c) Compare zero crossing detector with Schmitt trigger circuit. 4 marks

1 (d) What are the specifications of DAC? 4 marks

1 (e) Design a circuit to keep LED 'ON' for 20 seconds once circuit is triggered. 4 marks

2 (a) Define the following.
i) Slew rate
ii) CMRR
iii) Input offset voltage
iv) output offset voltage
4 marks

2 (b) Draw neat diagram of Instrumentation Amplifier using op-amp and hence derive the equation of output voltage. 4 marks

3 (a) Give complete procedure to design schmitt trigger circuit and hence design it for UTP=0.5V and LTP=0.5 V. 4 marks

3 (b) Explain 4-bit successive approximation type ADC. 4 marks

4 (a) i) Give design procedure of first order HPF.
ii) Draw functional block diagram of IC 8038.
iii) What is the basic and performance parameter of sample and hold amplifier circuit?
4 marks

4 (b) Design RC phase shift oscillator to procedure a sinusoidal frequency output of 5KHz. 4 marks

5 (a) Design triangular waveform generator for frequency of 5 KHz and Vopp=6 using op-amp. 4 marks

5 (b) Compare normal regulator with SMPS, explain any one circuit of SMPS. 4 marks

6 (a) Design voltage regulator using IC 723 to give V0=5V and output current =2A. 4 marks

6 (b) Explain in detail about frequency multiplier and application of PLL. 4 marks

modified 5 months ago  • written 5 months ago by gravatar for aniketbab1 aniketbab10
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