Computer Organization & Architecture Question Paper - May 2015 - Information Technology (Semester 3)

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Computer Organization & Architecture - May 2015

SPPU Information Technology (Semester 3)

Total marks: --50
Total time: --2:30 hours
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Solve any one question from Q1 and Q2

1 (a) With suitable diagram explain in brief Von Neumann Architecture. 6 marks

1 (b) Explain in brief functions of the following pins of 8086 :
i) ALE
ii) RD
iii) MN/MX. 6 marks

2 (a) Draw flow chart and explain Booth's Algorithm for two's complement multiplication. 6 marks

2 (b) Draw neat diagram of internal architecture of 8086 and explain any one block. 6 marks

Solve any one question from Q3 and Q4

3 (a) What are interrupts ? Explain interrupts of 8086. 6 marks

3 (b) Explain with suitable diagram multiple bus organization of CPU. 6 marks

4 (a) What is segmentation? List segment registers of 8086 and explain its use in brief. 6 marks

4 (b) Explain with suitable diagram hardwired control method for design of control unit. 6 marks

Solve any one question from Q5 and Q6

5 (a) Explain direct mapping technique used in Cache memory. 6 marks

5 (b) What is TLB ? Explain its use with suitable diagram. 6 marks

6 (a) List the different types of internal memory explain any two in brief. 6 marks

6 (b) Write a short note on optical memories. 6 marks

Solve any one question from Q7 and Q8

7 (a) Draw block diagram of 8255 PPI and explain it. 6 marks

7 (b) What is DMA ? Explain with neat diagram. 6 marks

8 (a) Compare serial V/s parallel I/O. Explain features of serial I/O USART 8251. 6 marks

8 (b) List various bus standards interfaces. Explain any one in detail with suitable diagram. 6 marks

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