Question Paper: Computer Organization & Architecture Question Paper - December 2013 - Information Technology (Semester 3) - Savitribai Phule Pune University (SPPU)

Computer Organization & Architecture - December 2013

SPPU Information Technology (Semester 3)

Total marks: --
Total time: --
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Solve any one question from Q1 and Q2

1 (a) Multiply following signed 2's complement numbers using Booth's algorithm where: Multiplicand=-1310 and Multiplier=-1110. 4 marks

1 (b) Draw and explain instruction cycle state diagram. 4 marks

1 (c) Draw the architecture of 8086 processor. 4 marks

2 (a) Draw IEEE standard single precision and double precision floating point formats and state various fields in it with their size and significance. Represent (-1259.125)10 in double precision format. 4 marks

2 (b) Draw timing diagram for memory read cycle of 8086 & list operations in each T state. 4 marks

Solve any one question from Q3 and Q4

3 (a) Explain following addressing modes of 8086 with an example of each: Immediate addressing, Base addressing, Base index with displacement addressing. 4 marks

3 (b) Explain the sequence of operations needed to perform processor functions :
i) Fetching a word from memory.
ii) Performing an arithmetic operation.
4 marks

4 (a) What do you mean by software interrupts? Explain how 8086 will respond to the software interrupts? 4 marks


4 (b) (i) Hardwired and Micro programmed control unit. 4 marks

4 (b) (ii) Horizontal and Vertical micro instruction format. 4 marks

Solve any one question from Q5 and Q6

5 (a) What is MESI protocol? Explain the meaning of each of the four states in the MESI protocol. 4 marks

5 (b) Explain direct cache mapping techniques along with its merits and demerits. 4 marks

6 (a) Write a short note on DA T and Blu-ray disk. 4 marks

6 (b) How the virtual address is translated to physical address in virtual memory? 4 marks

Solve any one question from Q7 and Q8

7 (a) Explain features of IC 8251. 4 marks

7 (b) Explain PCI bus with a diagram. 4 marks

7 (c) For the given specifications find out the control word for 8255:
i) I/O mode, mode '0', PA-i/p, PB- o/p, PCL- o/p, PCH- i/p.
ii) BSR mode set PC4 bit to '1'.
4 marks

8 (a) Compare programmed I/O with interrupt driven I/O. 4 marks

8 (b) With the help of neat diagram explain how DMA is used for data transfer? 4 marks

8 (c) Draw and explain the block diagram of PPI IC 8255. 4 marks

written 6 months ago by gravatar for msharvari97 msharvari970
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