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Computer Organization Question Paper - Dec 16 - Computer Science (Semester 4) - Visveswaraya Technological University (VTU)
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Computer Organization - Dec 16

Computer Science (Semester 4)

Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


PART - A
1(a) What is pipelining? How does it improve the performance of the computer? (08 marks)

1(b) Compare CISC versus RISC processor. (04 marks)

1(c) Explain clearly SPEC rating and its significance. (08 marks)

2(a) What is the need of an addressing mode? Explain three addressing modes with examples. (08 marks)

2(b) Convert the following numbers to signed, 2's compliment binary number and add them.
(i) 7 and -5      (ii) -10 and -13
(04 marks)

2(c) What is stack frames? Explain. (04 marks)

2(d) Explain the shift and rotate operations with example. (04 marks)

3(a) In modern computers, why interrupts are required? Support your claim with a suitable example. (04 marks)

3(b) Showing the possible register configaration in DMA interface, explain direct memory access. (08 marks)

3(c) With a neat sketch, explain the individual input and output interface circuits. Also elicit their salient features. (08 marks)

4(a) Write a note on PCI configuration and explain the neat figure the single processor system configurations. (08 marks)

4(b) Explain the different phases in the operations of SCSI bus speed in detail. (06 marks)

4(c) Explain the following:
i) USB addressing    &nbsp ii) USB protocols.
(06 marks)


PART-B
5(a) Describe SDRAM and DDR SDRAM operations for data transfer between main memory and cache memory systems. (08 marks)

5(b) Explain any one cache mapping function. (06 marks)

5(c) Consider a two level cache with access times of 5 ns and 80 ns respectively. If the hit rates are 95% and 75% respectively in the two caches and the memory access time is 250 ns, what is the average access time? (04 marks)

5(d) Calculate the effective address time if average page fault service time of milliseconds and a memory access time of 80 nano seconds. (Assume the probability of a page fault as 10%). (02 marks)

6(a) Explain how a 16-bit carry look ahead can be built from a 4-bit adder. (08 marks)

6(b) Using the non storing division algorithm, perform the division of numbers 23 by 5. (08 marks)

6(c) Explain the IEEE standards for floating point number. (04 marks)

7(a) Explain the process of fetching a word from memory using timing diagram of memory read operations, with an example. (08 marks)

7(b) Bring out any four difference between hardwired and microprogrammed control. (04 marks)

7(c) With a neat diagram, explain the microstruction sequencing organization. (08 marks)

8(a) Write a short note on power wall. (06 marks)

8(b) State and explain the Amdhal's law and compute the speed up gained for the following. Suppose that the new CPU is 10 times faster in computing floating point calculations and old CPU is busy with floating point calulations 40% of the time. Calculate speed up gained by the new CPU. (08 marks)

8(c) With a neat block diagram bring out the charecteristics of shared memory multiprocessors (SMPs). (06 marks)

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