0
1.6kviews
Design a single stage CE amplifier for peak output voltage of 3 V at 5k$\Omega$ BW=20 HZ to 20 KHZ. Use $V_{CC}$=12 V. The source has resistance of 600$\Omega$
1 Answer
0
24views

DC design

enter image description here

i)Selection of operating point Q

The operating point will be selected approximately at the center of dc load line to get output signal without distortion

$V_{CEQ}\frac{V_{CC}}{2}$=\frac{12}{2}=6 V .......(i)

and $I_{CEQ}\ge I_L{P}=\frac{V_{OP}}{R_{L}}=\frac{3}{5K}$=0.6mA

Hence select $I_{CQ}$=1mA .......(ii)

Therefore operating point Q(6V,1mA)

ii)Selection of transistor

Power dissipation =$6\times1$mA=6mW

Select the transistor BC146 with following specifications ......(iii)

$P_{D(max)}$=50mW, $V_{CE(max)}$=20V, I_{C(max)}=50mA

$V_{CB(max)}$=20V, $h_{FE}=80$

iii)Selection of $R_{E}$

For better stabilization use the voltage across emitter resistor approximately equal to $(1/10)^{th}$ of $V_{cc}$ or $5V_{BE}$

$V_{BE}=(1/10)^{th}V_{CC}=\frac{12}{10}$=1.2V

$R_{E}=\frac{V_{RE}}{I_{E}}=\frac{1.2}{1 mA}=1.2k\Omega \ \ \ \ .. . .. (iv)$

iv)Selection of $R_{C}$

The voltage across the collector resistor $R_{C}$

$V_{RC}=V_{CC}-V_{CEQ}-V_{RE}$

=12-6-1.2=4.8V

$R_{C}=\frac{V_{RC}}{I_{C}}=\frac{4.8V}{1mA}=4.8k\Omega \ \ \ \ ....(v)$

v)Selection of R_{1} and R_{2}

For better stability, the current flowing through resistor $R_{2}$ is approximately greater than 10 times base current or $(1/10)^{th}$ of $I_{C}$

$I_{2}=\frac{I_{C}}{10}=\frac{1mA}{10}-0.1mA$

and the voltage at base of transistor is

$V_{B}=V_{BE}+V_{RE}$ ($I_{B}$ is very small)

=0.7+1.2

$V_{B}$=1.9V

$R_{2}=\frac{V_{B}}{I_{2}}=\frac{1.9V}{0.1mA}=19k\Omega \ \ \ \ .......(vi)$

The value of current through $R_{1}$ is

$I_{1}=I_{B}+I_{2}=I_{2}$

(since $I_{B}=I_{c}/h_{FE}=1 mA/80=12.5\mu$ A very less hence neglected)

$R_{1}=\frac{V_{CC}-V_{B}}{I_{2}}$

$\frac{12-1.9}{0.1mA}=101 k\Omega=100k\Omega \ \ \ ....(vii)$

and parallet combination $R_{1}$ and $R_{2}$ is

$\frac{R_{1}R_{2}}{R_{1}+R_{2}}$

=$\frac{100K\times 16K}{100K+19K}=15.9k\Omega \ \ \ \ .....(viii)$

AC design

All the capacitive effects are considered at the lower 3 dB frequency.Since with increase in frequency the reactance of capacitor decreases. At high frequency it is almost short circuited.

vi) The effective ac load

$R_{Lte}$=$R_{C}||R_{L}=4.8K||5K$

$\frac{4.8k\times 5k}{4.8K+5K}=2.4k\Omega \ \ \ ....(ix)$

vii) Selection of emitter bypass capacitor $(C_{E})$

The reacatnce value of bypass capacitor can be calculated as

$X_{CE}=\frac{R_{E}}{10}=\frac{1.2K}{10}=120\Omega$

$C_{E}=\frac{1}{2\pi X_{CE}f_{0}}=\frac{1}{2\pi\times 120\times 20}$

$C_{E}=66.6\mu F=66\mu F \ \ \ \ ...... (x)$

viii) Selection fo coupling capacitor $(C_{1} and C_{2})$

The value of coupling capacitor $C_{1}$ is

$C_{1}=\frac{1}{2\pi X_{ci}f_{0}}$

But $X_{Ci}=\frac{R_{s}+R_{1}||R_{2}||h_{fe}}{10}$

=$\frac{600+(100K||19K||2.1K)}{10}$

$\frac{2.45K}{10}=245\Omega$

$C_{1}=\frac{1}{2\pi 245\times 20}=32\mu F \ \ \ ......(xi)$

and $C_{2}=\frac{10}{2\pi (R_{C}+R_{L})f_{0}}=\frac{10}{2\pi(4.8K+5K)\times 20}$

$\frac{10}{2\pi\times 9.8K\times20}$

$C_{2}=8.12\mu F=10\mu F \ \ \ ....(xii)$

Please log in to add an answer.