Electronics Engineering (Semester 7)
Total marks: 80
Total time: 3 Hours
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
Q1) Solve any four of the following.
What is the significance of High K and Low K dielectric in CMOS process?
Explain the difference between contact, proximity and projection printing?
Describe the SIMOX method for fabrication of SOI.
Enlist the steps for obtaining Silicon from Sand.
Explain the difference between Positive Photo resist and Negative Photo Resist.
Explain Float zone method for Silicon crystal growth. What are its advantages?
Classify the types of Thin Film Deposition methods.
Explain the LPCVD process with neat diagram. Also enlist its advantages
Enlist the steps for fabrication of CMOS inverter using twin tub process. Draw vertical cross-sectional views starting from the substrate till the gate and source and drain formation in the fabrication of CMOS inverter using twin tub process.
Draw layout of CMOS NOR gate along with its circuit diagram.
Explain buried and butting contact.
Explain Steps of Lithography with suitable diagrams. Also classify Lithography techniques.
What is LOCOS? Why it is required in the CMOS process. Explain technology solutions for avoiding problems in LOCOS.
Describe with the help of a neat diagram Hayness-Schokley experiment for measurement of Drift Mobility of n-type semiconductor.
Explain Deal Groove model for Oxidation process. Explain where dry and wet oxidation processes are used during MOSFET fabrication process.
Q6) Write short notes on any four of the following.
Automatic Test equipment
Hall effect and resistivity measurement.
Fabrication of carbon nanotube transistor.