Implement D flip-flop using Static CMOS. What are other design methods for it? [10] OR Draw D flipflop using CMOS and explain the working.

25kviews

written 5.4 years ago by

hetalgosavi • 1.6k

• modified 5.1 years ago

Subject :- VLSI Design

Topic :- MOS Circuit Design Styles

Difficulty :- High

vlsi design

ADD COMMENT EDIT

1 Answer

2.0kviews

written 5.1 years ago by

hetalgosavi • 1.6k

Following figure shows, the gate level representation of D-latch obtained by modifying the clocked NOR based SR latch circuit.

As shown, the circuit has single input D, which is directly connected to the S input of the latch. The input variable D is also inverted and connected to the R …

Create a free account to keep reading this post.

and 5 others joined a min ago.

ADD COMMENT EDIT

Please log in to add an answer.