Subject :- VLSI Design

Topic :- MOS Circuit Design Styles

Difficulty :- High

Pseudo nMOS logic

• This technique uses single pMOS transistor with grounded gate. The logical inputs are applied to nMOS logic circuit.
• The static power dissipation is significant.
• Since the voltage swing on the output and overall functionality depends on ratio of the nMOS and pMOS transistor sizes, this circuit is …