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Explain working of 6-T SRAM cell.

Subject: Basic VLSI Design

Topic: Semiconductor Memories

Difficulty: Medium

1 Answer
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  • A low-power SRAM cell may be designed simply by using cross-coupled CMOS inverters. The possible drawback of using CMOS SRAM cells, on the other hand, is that the cell area tends to be slightly larger in order to accommodate the n-well for the pMOS transistors and the polysilicon contacts.
  • The …

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