Write short notes on: NOR based ROM array

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written 5.4 years ago by

hetalgosavi • 1.6k

• modified 5.1 years ago

Subject: Basic VLSI Design

Topic: Semiconductor Memories

Difficulty: Medium

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written 5.1 years ago by

hetalgosavi • 1.6k

Consider the first 4-bit X 4bit memory array as shown in Figure below. Here, each column consists of a pseudo nMOS NOR gate driven by some of the row signals, i.e., the word line.
Only one word line is activated at a time by raising its voltage to VDD, while …

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