Page: Binary Weighted Resistor DAC

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This circuit uses a n/w of binary weighted resistors and a summing amplr

The resistors $2^{p}R, 2^{2}R, ....2^{n}R$ form a n/2 of binary weighted resistors.

There are "n" number of electronic switches used, one per digital bit. They are single pole double throw(SPDT) type switches. The position of the moving arm of every switch is controlled by the binary i/p ward.

If binary bit $d_{1}=1$ then the first SPDT switch will connect resistor $2^{1}R$ to a -vr ref voltage (-VR) and when $d_{1}=0$ teh switch will connect this resistor to ground.

Depending upon the p of n s of various switches the currents $I_{1}$ to In will start flowing through the resistors $2^{1}R$ to $2^{n}R$ resp.

Due to high i/p impedance of op-amp the current flowing through i/p terminals of op-emp is zero


Now $v_{o}=+I_{o}R_{F}$




When $R_{F}=R$


o/p voltage wave form of a 3-bit DAC:

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$v_{o}=V_{R}[d_{1}2^{-1}+d_{2}2^{-2}+d_{3}2^{-3}]$ for 3-bit DAC

For i/p $d_{1}d_{2}d_{3}$=100

$V_{D}=V_{R}[1\times^{-1}+0\times 2^{-2} + 0\times 2^{-3}]$


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modified 7 weeks ago by gravatar for Sanket Shingote Sanket Shingote ♦♦ 250 written 9 weeks ago by gravatar for stanzaa37 stanzaa370
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