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Dual slope Integrator ADC
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Dual slope conversion is an indirect method for A/D conversion where an analog voltage and a ref voltage are converted into time periods by an integrator and then measured by a counter. The speed of this conversion is slow but the accuracy is high

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Dual slope A/D converter has four major blocks:

i) An integrator ii) a comparator

iii) SPDT control switch iv) A binary counter

The conversion process begin at t=0 with the switch S in posn '0 there by connecting the analog voltage Va to the i/p of the integrator. The o/p of T- fllipflop. Q is maintained at zero state

the integrator o/p

$V_{0}=\frac{-1}{2}\int^{t}_{0}Vadt =\frac{Va}{R_{1}c_{1}}t$

This ADC will integrate the analog i/p $V_{A}$ for a fized duration of $2^{n}$ number of clock cycles. This time interval is required for the counter to advance through all its possible o/p states, because for an n-bit counter there will be $2^{n}$ possible o/p states. The couunter o/p the reduces to zero. This time duration is represented by $T_{1}$

$V_{0}=\frac{-v_{A}T_{1}}{R_{1}c_{1}}$

This expression represents a straight line with a aslope of -$V{A}$/Rc. Thus we get a decreasing ramp. The time period $T_{1}$is represented by $2^{n}$ clock pulses.

$T_{1}=2^{n}T$ where T= clock cycle period

At the end of interval $T_{1}$ the integrator i/pf is connected to a fixed negative re. voltage -$V_{R}$ via switch s. The integration o/p now starts increasing towards zero with a +ve slope. The slope is $V_{R}/R_{1}c_{1}$ for the duration $T_{2}$ .The counter starts counting from 0.The integration will continue till the integration o/p is non-zero. As soon as Vo goes positive at $T_{2}$ Vc goes low disabling the AND gate.

At the end of $T_{2}$ , the counter o/p shows a no corresponding to N clock cycles . Hence N represents the desired digital o/p code proportional to analog i/p $v_{A}$ $T_{2}$=NT

If $V_{A}$ increases then the integrator capacitor will charge to a higher -ve voltage during the time interval $T_{1}$ the time $T{_2}$ required to reduce the integrator o/p to zero increases counter o/p count N will be higher Thus N is proportional to $V_{A}$

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Conversion Time:-

The integration o/p ramp down to a voltage $\frac{-Va}{Z}T_{1}$ and get back to zero

The change voltage = discharge voltage

$\frac{V_{A}T_{1}}{R_{1}c_{1}}=\frac{V_{R}T_{2}}{R_{1}c_{1}}$

$T_{2}\frac{V_{A}}{V_{R}}T_{1}$

Here $T_{2}=NT$ and $T_{1}=2^{n}T$

NT=$\frac{V_{A}}{V_{R}}2^{n}T$

N=$\frac{2^{n}}{V_{R}}.V_{A}$

V=K.$V_{A}$

If K is constant the no. of counts N is proportional analog voltage $V_{A}$

Number of count N is independent of R, C and clock period T.

Advantages:

i) It is highly accurate

ii) Its cost is low

iii) It is immuns to temp caused variations in $R_{1}$ and $C_{1}$

Disadvantage:

i) conversion requires longer time

T=$T_{1}+T_{2}$

=$2^{n}T+NT=T[2^{n}+N]$

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