1. Clocking and system design

1.Clock generation distribution and stabilization

=>clock generation

• Clock signals are the heartbeats of the digital system

• A simple techinque used for an chip generation of a primary clock signal would be to use a ring oscillator

• No of inverters must be odd

• Oscillation starts by amplifying the noise residing in the circuit

• Buffers are needed to drive load

• Clock frequency is process dependent and unstable

The simple ckt that generates a pair of non overlapping clock signals from ckt

=> Clock Distribution:

• It is always desirable to distribute clock signal over the chip are with a uniform delay. In order to handle high fanout loads the clock signals must be buffered in multiple stages

• It is also important that every buffer stage drives the same number of fan out Gate so that clock dealers are always buffered

Systemic h tree clock distribution

Since the distance from the centre to all the branch Are same the signals delay same

=>Clock stabilisation:

• An externally applied clocking signal controls the system operation of the printed circuit board level

• The internal circuitry of the v i s i chip must be synchronised to external clock

• Stabilization circuits are used to ensure that on chip calculation can be properly interfaced to board level components