User: Hetal Gosavi

gravatar for Hetal Gosavi
Reputation:
0
Status:
Trusted
Location:
Mumbai
Scholar ID:
Google Scholar Page
Last seen:
1 day, 8 hours ago
Joined:
8 months, 3 weeks ago
Email:
h******@gmail.com

Posts by Hetal Gosavi

<prev • 460 results • page 1 of 46 • next >
0
votes
1
answer
43
views
1
answers
Answer: A: Design two stage operational amplifier that meet the following specifications wi
... ![][1] - Assuming ![][2] - Circuit to be designed: ![][3] M3 and M4 are the diode connected loads. M8 is missing and can be added later for offset nulling. - For good stability, |$P_1$| > |$P_2$| ![][4] - Further we can see that Z1 > 10 GBW ![][5] - From (1) and (2) we get, $ ...
written 4 days ago by Hetal Gosavi0
0
votes
1
answer
50
views
1
answers
Answer: A: Write short note on advantages and disadvantages of DLL
... 1. PLLs have disadvantages that make their use in high-speed designs problematic, particularly when both high performance and high reliability are required. The PLL voltage-controlled oscillator (VCO) is the greatest source of problems. Variations in temperature, supply voltage, and manufacturing pr ...
written 17 days ago by Hetal Gosavi0
0
votes
1
answer
48
views
1
answers
Answer: A: Explain in detail charge pump PLL
... - The charge pump circuit senses the transition at input and output, detects phase or frequency differences, and activates the charge pump accordingly. - When the input and output frequencies are sufficiently close, the PFD (Phase Frequency Detector) operates as the phase detector, performing phase ...
written 19 days ago by Hetal Gosavi0
0
votes
1
answer
55
views
1
answers
Answer: A: List the non-ideal effects in charge pump circuit and justify how it impacts the
... ####**A) Phase frequency detector (PFD)/ Charge pump (CP) non-linearity:** - Several imperfections on the PFD/ CP circuits lead to high ripple on the control voltage even when the loop is locked. Therefore ripple modulates the VCO frequency producing a waveform which is no longer periodic. ![][1] ...
written 19 days ago by Hetal Gosavi0
0
votes
1
answer
52
views
1
answers
Answer: A: Draw and explain charge pump circuit.
... - The phase-locked loop (PLL) is one of the key building blocks in many communication systems; providing a means for maintaining timing integrity and clock synchronization. The PLL can be used in various applications such as timing extraction from data streams, jitter mitigation and frequency synthe ...
written 19 days ago by Hetal Gosavi0
0
votes
1
answer
50
views
1
answers
Answer: A: Explain non-inverting switched capacitor amplifier circuit.
... - The amplifier operates as in figure (a). - In sampling mode, switches S1 and S2 are ON and S3 is OFF creating a virtual ground at X and allowing voltage across C1 to track input voltage as in figure (b). - At the end of sampling mode, switch S2 is OFF which injects a constant charge Δ$q_2$ onto no ...
written 19 days ago by Hetal Gosavi0
0
votes
1
answer
57
views
1
answers
Answer: A: What are the types of noise of CS stage.
... Consider the common source stage as shown below: ![][1] We model the thermal and flicker noise of M1 by two current sources – ![][2] We also represent thermal noise of $R_D$ by current source ![][3] The output noise voltage per unit Bandwidth is given by – ![][4] The noise mechanisms are ...
written 22 days ago by Hetal Gosavi0
0
votes
1
answer
91
views
1
answers
Answer: A: Explain the white noise and flicker noise in case of MOSFET. Explain which noise
... ####**Thermal/ White noise:** - MOS transistors also exhibit thermal or white noise. The significant source is generated in the channel. - For MOS devices operating in saturation region the channel noise can be modeled by a current source connected between the drain and source terminal and expresse ...
written 27 days ago by Hetal Gosavi0
0
votes
1
answer
238
views
1
answers
Answer: A: Derive expression for Voltage Gain Av and Output Resistance Ro of source followe
... **Source follower** stage (also called as “**common-drain**” stage) can operate as voltage buffer since its voltage gain is almost equal to 1. The source follower senses the signal at the gate and drives the load at the source, allowing the source potential to “follow” the gate voltage. ![][1] Wh ...
written 29 days ago by Hetal Gosavi0
0
votes
1
answer
97
views
1
answers
Answer: A: For W/L = 50/0.5 and $I_D$ = 0.5 mA, calculate the transconductance and output i
... Let us consider, ![][1] **For NMOS,** Transconductance is given by – ![][2] Output impedance is given by – ![][3] Intrinsic gain is given as – ![][4] **For PMOS,** Transconductance is given by – ![][5] Output impedance is given by – ![][6] Intrinsic gain is given as – ![][7] [1] ...
written 4 weeks ago by Hetal Gosavi0

Latest awards to Hetal Gosavi

Supporter 3 months ago, voted at least 25 times.
Popular Question 4 months ago, created a question with more than 1,000 views. For Difference between RTOS and GPOS.
Popular Question 4 months ago, created a question with more than 1,000 views. For What is a Shared data problem.
Centurion 7 months ago, created 100 posts.
Rising Star 8 months ago, created 50 posts within first three months of joining.