## User: Vedant Chikhale

Vedant Chikhale •

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#### Academic profile

#### Posts by Vedant Chikhale

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... A universal shift register is a bidirectional register, whose input can either in serial form or in parallel form and whose output can also be either in serial form or in parallel form.
Following figure shows the logic diagram of the 74194 4-bit universal shift register. Note that the output of eac ...

written 9 weeks ago by
Vedant Chikhale •

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... **Subject** : Digital System Design (MU - EXTC Sem 3)
**Lesson** : Sequential Logic Circuits
**Difficulty** : Medium
**Marks** : 10M ...

written 9 weeks ago by
Vedant Chikhale •

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... Magnitude Comparator is a combinational circuit capable of comparing the relative magnitude of two binary numbers. It is one of the two types of digital comparator.
![enter image description here][1]
Figure shows the block diagram of n-bit magnitude comparator. It accepts two n-bit binary numbers, ...

written 9 weeks ago by
Vedant Chikhale •

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... **Subject** : Digital System Design (MU - EXTC Sem 3)
**Lesson** : Logic Gates and Combinational Logic Circuits
**Difficulty** : Medium
**Marks** : 10M ...

written 9 weeks ago by
Vedant Chikhale •

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... **Subject** : Digital System Design (MU - EXTC Sem 3)
**Lesson** : Logic Gates and Combinational Logic Circuits
**Difficulty** : Medium
**Marks** : 10M ...

written 9 weeks ago by
Vedant Chikhale •

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... In a parallel adder circuit, the carry output of each full adder stage is connected to the carry input of the next higher-order stage, hence it is also called as ripple carry type adder. In such adder circuits, it is not possible to produce the sum and carry outputs of any stage until the input carr ...

written 9 weeks ago by
Vedant Chikhale •

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... **Subject** : Digital System Design (MU - EXTC Sem 3)
**Lesson** : Logic Gates and Combinational Logic Circuits
**Difficulty** : Medium
**Marks** : 5M ...

written 9 weeks ago by
Vedant Chikhale •

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... Step 1. Grouping maxterms according to number of 1s
![enter image description here][1]
Step 2. Combining maxterms in group of two
![enter image description here][2]
Step 3. Combining maxterms in group of four
![enter image description here][3]
Interpreting from the table -
$F(A,B,C,D) = \ba ...

written 11 weeks ago by
Vedant Chikhale •

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... Step 1. Grouping minterms according to number of 1s
![enter image description here][1]
Step 2. Combining minterms in group of two
![enter image description here][2]
Step 3. Combining minterms in group of four
![enter image description here][3]
Interpreting from the table -
$F(A,B,C,D) = \b ...

written 11 weeks ago by
Vedant Chikhale •

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... For maxterms M, we connect the given input lines to logic 1.
Design Table -
Check column wise for input to MUX.
|Inputs|D0|D1|D2|D3|D4|D5|D6|D7|
|---|---|---|
|$\bar A$|$\underline 0$|$\underline 1$|2|3|$\underline 4$|$\underline 5$|$\underline 6$|7|
|A|$\underline 8$|9|$\underline {10}$|11|$\un ...

written 11 weeks ago by
Vedant Chikhale •

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For List and explain the second order effects in MOSFET

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