Question: **Implement following function using 8:1 MUX and logic gates.**
1

Mumbai University > Electronics Engineering > Sem 3 > Digital Circuits and Design

Marks: 10M

Year: May 2016

P (A, B, C, D) = ∑m (1, 2, 6, 7, 8, 10, 13, 14)

ADD COMMENTlink
modified 2.6 years ago  • written 2.6 years ago by gravatar for ak.amitkhare.ak ak.amitkhare.ak80
0
  • Design table:-
Inputs D0 D1 D2 D3 D4 D5 D6 D7
A’ 0 1 2 3 4 5 6 7
A 8 9 10 11 12 13 14 15
Input to Mux A A’ 1 0 0 A 1 A’

Implementation of Logic Circuit

enter image description here

ADD COMMENTlink
modified 2.6 years ago  • written 2.6 years ago by gravatar for ak.amitkhare.ak ak.amitkhare.ak80
Please log in to add an answer.