Microprocessor Architecture - December 2015

SPPU Computer Engineering (Semester 3)

Total marks: --
Total time: -- INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary

Solve any one question from Q1 and Q2

1 (b) Explain how physical address is formed in 80386 Dx microprocessor. 3 marks

1 (c) Explain the following signal function of 80386 Dx microprocessor:
i) Lock #
ii) BE0 # - BE3 #
iii) HOLD and HLDD. 3 marks

2 (a) Explain four level of hierarchical protection in 80386 Dx microprocessor. 3 marks

2 (b) Draw and explain the architecture of 8086 microprocessor. 3 marks

2 (c) What is maximum size of each segment in 80386 Dx microprocessor? Why? 3 marks

Solve any one question from Q3 and Q4

3 (b) List and explain iteration control instruction of 80386 Dx microprocessor. 3 marks

3 (c) Briefly explain how to set V86 mode. 3 marks

4 (a) Explain four different processor control instructions. 3 marks

4 (b) Explain non-pipelined write cycle with timing diagram. 3 marks

4 (c) Briefly explain how to be protected mode. 3 marks

Solve any one question from Q5 and Q6

5 (b) Explain the execution model of SIMD with neat diagram. 3 marks

5 (c) Explain software developer's viewpoint about multicore processor. 3 marks

6 (a) Write different advantages of multicore design. 3 marks

6 (b) Explain different multiprocessor architectures. 3 marks

6 (c) What is front side bus, back side bus? Explain. 3 marks

Solve any one question from Q7 and Q8

7 (b) Explain Intel Hyperthreading Technology. 3 marks

7 (c) What are the differences between IA-32 basic execution environment and 64 bit mode execution environment? 3 marks

8 (a) Explain X86 virtualization technology in detail. 3 marks

8 (b) Explain data types of 64 bit architecture. 3 marks

8 (c) Enlist features of SSE. 3 marks