Write short note on VHDL features.?


features of vhdl • 1.3k  views

VHDL stands for very high-speed integrated circuit hardware description language. It is a programming language used to model a digital system by dataflow, behavioral and structural style of modeling. This language was first introduced in 1981 for the department of Defense (DoD) under the VHSIC program.

Describing a Design

In VHDL an entity is used to describe a hardware module. An entity can be described using,

  • Entity declaration

  • Architecture

  • Configuration

  • Package declaration

  • Package body

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