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8086 Memory Banks

The 8086 has 20-bit address bus, so it can address 2^20 or 1,048,576 addresses. Each address represents a stored byte. To make it possible to read or write a word with one bus cycle, the memory for an 8086 is set up in to 2 banks of up to 524,288 bytes each. See figure.

8086 Memory Banks

One memory bank contains all the bytes which have even addresses such as 00000h, 00002h, and 00004h etc. the data lines of this bank is connected to the lower 8 bit data lines i.e. from D0 to D7 of 8086.

The other memory bank contains all bytes which have odd addresses such as 00001h, 00003h and 00005h etc. the data lines of this bank is connected to the upper 8 bit data lines i.e. from D8 to D15 of 8086.

Address line A0 is used for enabling the memory device in the lower bank. An addressed memory device in this bank will be enabled when A0 is low, as it will be for any even address. Like address 00222h = 0000 0000 0010 0010 0010. Address lines A1 to A19 are used to select the desired memory device in the bank and hence the desired byte in the device.

Address line A1 to A19 are also used to select the desired memory device in the upper bank and hence the desired byte. An additional part of enabling the upper bank memory device is handled by the BHE i.e. the bus high enable signal. This is multiplexed out from the 8086 at the same time as an address is sent out. An external latch, strobbeed by the ALE signal, grabs the BHE signal and holds it stable for the rest of the machine cycle like it does for the address.

So now if we read a byte from or write a byte to an even address the A0 will be low BHE will be high enabling the lower bank and disabling the upper bank.

The main reason that the A0 and BHE signal work as they do is to prevent the writing of an unwanted signal. enter image description here

The 8086 has 20-bit address bus, so it can address 2^20 or 1,048,576 addresses. Each address represents a stored byte. To make it possible to read or write a word with one bus cycle, the memory for an 8086 is set up in to 2 banks of up to 524,288 bytes each. See figure.

8086 Memory Banks

One memory bank contains all the bytes which have even addresses such as 00000h, 00002h, and 00004h etc. the data lines of this bank is connected to the lower 8 bit data lines i.e. from D0 to D7 of 8086.

The other memory bank contains all bytes which have odd addresses such as 00001h, 00003h and 00005h etc. the data lines of this bank is connected to the upper 8 bit data lines i.e. from D8 to D15 of 8086.

Address line A0 is used for enabling the memory device in the lower bank. An addressed memory device in this bank will be enabled when A0 is low, as it will be for any even address. Like address 00222h = 0000 0000 0010 0010 0010. Address lines A1 to A19 are used to select the desired memory device in the bank and hence the desired byte in the device.

Address line A1 to A19 are also used to select the desired memory device in the upper bank and hence the desired byte. An additional part of enabling the upper bank memory device is handled by the BHE i.e. the bus high enable signal. This is multiplexed out from the 8086 at the same time as an address is sent out. An external latch, strobbeed by the ALE signal, grabs the BHE signal and holds it stable for the rest of the machine cycle like it does for the address.

So now if we read a byte from or write a byte to an even address the A0 will be low BHE will be high enabling the lower bank and disabling the upper bank.

The main reason that the A0 and BHE signal work as they do is to prevent the writing of an unwanted signal. enter image description here


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8086 Memory Banking

• The 8086 processor provides a 16-bit data bus. So, It is capable of transferring 16 bits in one cycle, but each the memory location is only of a byte(8 bits), therefore we need two cycles to access 16 bits(8 bit each) from two different memory locations.

• The solution to this problem is Memory Banking. Through Memory banking, our goal is to access two consecutive memory locations in one cycle(transfer 16 bits).

• The 1MB memory chip is equally divided into two parts(banks). One of the banks contains even addresses called Even bank and the other contains odd addresses called Odd bank.

• Even bank always gives lower byte So Even bank is also called Lower bank(LB) and Odd bank is also called a Higher bank(HB).

• This banking scheme allows accessing two aligned memory locations from both banks simultaneously and process 16-bit data transfer.

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