Mumbai University > Electronics Engineering > Sem 6 > Embedded System and RTOS
- Serial peripheral interface (SPI) is a synchronous bi-directional full duplex four wire serial interface bus.
- SPI requires four lines for communication and they are:
a. Master Out Slave In (MOSI): Signal line carrying data from master to slave device. Also known as Slave Input/Slave Data In(SI/SDI).
b. Master In Slave Out(MISO): Signal line carrying data from slave to master device. Also known as Slave output/Slave Data Out(SO/SDO).
c. Serial Clock(SCLK): Signal line carrying clock signals
d. Slave Select (SS): Signal line for slave device select. It is an active low signal.
- The master device is responsible for generating the clock signal,
- It also selects the required slave device by asserting the device’s slave select line ‘LOW’ The MISO lines of all slave devices are in high impedance state when they are not selected.
- The serial communication is fully configurable with baud rate selection, master/slave selection, clock signal control etc.
- The master and slave devices contain special shift register for the data to transmit or receive.
- The size of the data is normally device dependent and is a multiple of 8.
- During the transmission from master to salve, the data in master’s shift register is shifted out of MOSI pin and it enters the slave device through the MOSI pin of slave.
- Similarly the data shifted out through slave’s MISO pin enters the master’s through its MISO pin.
- A SPI interface can have more than one master provided that at a given time only one master is active.
- The diagram above illustrates a typical SPI master-slave configuration.
Comparison with parallel interface:
- A parallel interface requires separate channel for each bit to be transmitted whereas a serial interface requires a single line for communication and the bits are transmitted one after the another. Serial communication interfaces are suitable for transmission over long distances.
- Serial communication interface is slower than the parallel interface because all the bits are transmitted at one go in parallel interface.
- Skewing of communication signals is prevalent in parallel interface.
- Connecting multiple devices on a common parallel interface requires a complex logic circuitry for selection of the device than that required for connecting devices on a common serial interface.