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Logic Analyzers in comparison with a CRO
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Logic Analyzer is a tool that captures signals and graphs them on its screen.

  1. A logic analyzer can track many signals simultaneously.

  2. The logic analyzer has only 2 voltages, VCC and GND. The display looks like a timimg diagram. If the signal has a voltage between VCC and ground, logic analyzer will report it as VCC or GND. Oscilloscope will tell the exact voltage.

  3. Logic Analyzers are storage devices. They captures signals first and display them later.

  4. Triggering mechanisms in logic analyzer is complex compared to CRO.

  5. Logic Analyzer captures digital data. CRO captures all kinds of waves.

  6. Total number of waves captured in CRO is limited. Logic Analyzers have connectors and clips attached to target board for capturing digital data.

Modes of operation of logic analyzers:

Logical analyzer is a troubleshooting hardware diagnostic tool that records the state.

  • As a function of time

  • As a function of other states.

  1. Logic Analyzer is a power tool to collect through multiple input lines from buses, ports and records many bus transactions.

  2. It displays the collected details on the monitor to debug real time triggering conditions.

  3. Oscilloscope checks two signal lines, logic analyzer checks multiple lines carrying the address data and control lists and the clock.

1) As a function of time: Analyzer checks the logic states as a function of time and stores these in memory and displays on screen.

  1. It tracks multiple signals simultaneously and successively.

  2. There are multiple input lines connected from system and 10 buses, ports and peripherals.

  3. It collects the details of bus transactions and displays on the monitor. The result can also be printed.

  4. The phase difference between the input lines also gives important clue.

  5. It helps to find bus and port signal status.

2) As a function of other states:

  1. Buses are connected to the probe pins of logic analyzer which gives the captured state pf all signals at clock edge.

  2. The triggering point for capturing the status can be defined by the user.

  3. Certain bugs can be recorded by repeated runs of the system.

Drawback:

  1. It will not help on a program halt due to a bug.

  2. It will not show the register and memory contents.

  3. Modification of memory content is not possible.

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