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This simple enhancement-mode common source mosfet amplifier configuration uses a single supply at the drain and generates the required gate voltage, V$_{G}$ using a resistor divider. We remember that for a MOSFET, no current flows into the gate terminal and from this we can make the following basic assumptions about the MOSFET amplifiers DC operating conditions.

V$_{DD}$ = I$_{D}$R$_{D}$ + V$_{DS}$ + I$_{D}$R$_{S}$

= I$_{D}$(R$_{D}$ + R$_{S}$) + V$_{DS}$

$\therefore$ R$_{D}$ + R$_{S}$ = $\frac{V_{DD} - V_{DS}}{I_{D}}$

Then from this we can say that:

R$_{D}$ = $\frac{V_{DD} - V_{D}}{I_{D}}$ and R$_{S}$ = $\frac{V_{S}}{I_{D}}$

and the mosfets gate-to-source voltage, V$_{GS}$ is given as:

As we have seen above, for proper operation of the mosfet, this gate-source voltage must be greater than the threshold voltage of the mosfet, that is V$_{GS}$ > V$_{TH}$ . Since I$_{S}$ = I$_{D}$ , the gate voltage, V$_{G}$ is therefore equal to:

V$_{GS}$ = V$_{G}$ - I$_{D}$R$_{S}$

$\therefore$ V$_{G}$ = V$_{GS}$ + I$_{D}$R$_{S}$

or V$_{G}$ = V$_{GS}$ + V$_{S}$

To set the mosfet amplifier gate voltage to this value we select the values of the resistors, R1 and R2 within the voltage divider network to the correct values. As we know from above, “no current” flows into the gate terminal of a mosfet device so the formula for voltage division is given as:

**MOSFET Amplifier Gate Bias Voltage**

V$_{G}$ = V$_{DD}[\frac{R_{2}}{R_{1} + R_{2}}$]

Note that this voltage divider equation only determines the ratio of the two bias resistors, R1 and R2 and not their actual values. Also it is desirable to make the values of these two resistors as large as possible to reduce their I$^2$ *R power loss and increase the mosfet amplifiers input resistance.

**MOSFET Amplifier Example No1**

An common source mosfet amplifier is to be constructed using a n-channel eMOSFET which has a conduction parameter of 50mA/V$^2$ and a threshold voltage of 2.0 volts. If the supply voltage is +15 volts and the load resistor is 470 Ω, calculate the values of the resistors required to bias the MOSFET amplifier at 1/3(V$_{DD}$ ). Draw the circuit diagram.

Values given: V$_{DD}$ = +15V, V$_{TH}$ = +2.0V, k = 50mA/V$^2$ and R$_{D}$ = 470Ω.

**(1) Drain current, I$_{D}$**

V$_{D}$ = $\frac{V_{DD}}{2}$ = $\frac{15}{2}$ = 7.5v

I$_{D}$ = $\frac{V_{D}}{R_{D}}$ = $\frac{7.5}{470}$ = 16mA

**(2) Gate source voltage, V$_{GS}$**

I$_{D}$ = k(V$_{GS}$ - V$_{TH}$)$^2$

$\therefore$ V$_{GS}$ = $\sqrt{\frac{I_{D}}{k}}$ + V$_{TH}$ = $\sqrt{\frac{0.016}{0.05}}$ + 2.0 = 2.6V.

**(3) Gate voltage, V$_{G}$**

V$_{G}$ = $\frac{1}{3}$V$_{DD}$ = $\frac{15}{3}$ = 5v

V$_{G}$ = V$_{GS}$ + V$_{S}$

$\therefore$ V$_{S}$ = V$_{G}$ - V$_{GS}$ = 5 - 2.6 = 2.4v

Thus applying KVL across the mosfet, the drain source voltage, V$_{DS}$ is given as:

V$_{DD}$ = V$_{D}$ + V$_{DS}$ + V$_{S}$ = 15v

$\therefore$ V$_{DS}$ = V$_{DD}$ - V$_{D}$ - V$_{S}$ = 15 - 7.5 - 2.4 = 5.1v

**(4) Source resistance, R$_{5}$**

R$_{S}$ = $\frac{V_{S}}{I_{D}}$ = $\frac{2.4}{0.016}$ = 150 $\Omega$

The ratio of the voltage divider resistors, R$_{1}$ and R$_{2}$ required to give 1/3 V$_{DD}$ is calculated as:

V$_{G}$ = V$_{DD}[\frac{R_{2}}{R_{1} + R_{2}}$] = 15[$\frac{1}{3}$]

If we choose: R1 = 200kΩ and R2 = 100kΩ this will satisfy the condition of: V$_{G}$ = 1/3V$_{DD}$ . Also this combination of bias resistors will give an input resistance to the mosfet amplifier of approximately 67kΩ.

We can take this design one step further by calculating the values of the input and output coupling capacitors. If we assume a lower cut-off frequency for our mosfet amplifier of say, 20Hz, then the values of the two capacitors taking into account the input impedance of the gate biasing network is calculated as:

R$_{in}$ = $\frac{R_{1} \times R_{2}}{R_{1} + R_{2}}$ = $\frac{200k \times 100k}{100k + 200k}$ $\approx$ 67k$\Omega$

f$_{(-3dB)}$ = 20Hz = $\frac{1}{2\pi R_{in} C}$

$\therefore$ C = $\frac{1}{2\pi f R_{in}}$

C = $\frac{1}{2\pi \times 20 \times 67000}$ = 0.12$\mu$F

Then the final circuit for the single stage MOSFET Amplifier circuit is given as: