If a register has shift and parallel load capabilities, then it is called a shift register with parallel load or universal shift register.
Shift registers can be used for converting serial data to parallel data and vice versa, if a parallel load capacity is added to a shift register, then data entered in parallel can be taken out in serial fashion by shifting the data stored in the register.
Universal shift register consists of four D flip flops and four 4-input multiplexes (MUX).
Let $S_o$ and $S_1$ be the two selection inputs connects to all four multiplexers. these two selection inputs are used to select one of the four inputs of each MUX.
Input 0 in each MUX is selected when $S_1 S_0 = 00$ and input 1 is selected when $S_1s_o = 01$. similarly, inputs 2 & 3 are selected when $S_1 S_0 = 00$, the present value of the register is applied to the D inputs of flip-flops. this is done by connecting the output of each flip flop to the 0 input of respective multiplexer.
The next clock pulse transfers into each flip flop, the binary value it held before and hence, no change of state.
When $S_1 S_0 = 01$, terminal 1 of the MUX inputs has a path to D inputs of flip flops. this causes a shift right operation with left serial input transferred into flip-flop A4.
When $S_1 S_0 = 10$, a shift left operation results, with the right serial input going into flip-flop A1.
Finally, when $S_1 S_0 = 11$, the binary information on the parallel input lines $(i_1, i_2, i_3, i_4)$ is transferred into register simultaneously during the next clock pulse.
function table of bidirectional shift register.