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Computer Organization And Architecture Question Paper - Dec 18 - Computer Engineering (Semester 3) - Pune University (PU)
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Computer Organization And Architecture - Dec 18
Computer Engineering (Semester 3)
Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
1.a. List the elements of Bus Design. Explain any two elements
of Bus Design.
(6 marks)
00
1.b.Using Booth’s algorithm multiplies the following :
Multiplicand = + 22
Multiplier = – 5
Or
2.a.) Draw and explain data flow of floating point addition.
(6 marks)
00
2.b.
Explain Direct cache mapping technique with its advantages
and disadvantages.
(6 marks)
00
3.a.
What are data transfer modes of DMA ? Explain any two
in detail.
(6 marks)
00
3.b. Discuss the following I/O mechanisms for transferring data with
a neat flowchart :
(i) Programmed I/O
(ii) Interrupt driven I/O
(6 marks)
00
4.a. What is Machine Instruction ? Explain types of Machine
Instructions.
(6 marks)
00
4.b. Explain the following addressing modes along with suitable
example :
(i) Direct addressing
(ii) Indirect addressing
(iii) Displacement addressing mode
(6 marks)
00
5.a. Draw and explain the functional block diagram of 8086.
(7 marks)
00
5.b. Explain the use of the following registers of 8086 CPU :
(i) General purpose registers
(ii) Segment Register
(iii) Pointer and Index register
(iv) Flag Register
(6 marks)
00
Or
6.a. Draw and explain instruction cycle state diagram.
(7 marks)
00
6.b. Compare superscalar and superpipelined approaches in superscalar
processor.
(6 marks)
00
7.a. Explain the following instruction execution phases with suitable
example :
(i) Fetch the instruction
(ii) Fetch the operand
(iii) Execute the instruction
(7 marks)
00
7.b. Draw and explain Microprogrammed Control Unit.
(6 marks)
00
Or
8.a. Explain in detail the following microinstruction sequencing
techniques :
(i) Single Address Fields
(ii) Variable Address Fields
(6 marks)
00
8.b. Name the different design methods for hardwired control units.
Explain in detail with any one design method.
(7 marks)
00
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