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Digital signal processing Question Paper - Dec 18 - Electronics Engineering (Semester 7) - Mumbai University (MU)
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Digital signal processing - Dec 18
Electronics Engineering (Semester 7)
Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.
1.a. Compare DSP and Microprocessor.
(5 marks)
00
1.b. Explain quantization effect in computation of DFT.
(5 marks)
00
1.c.
(5 marks)
00
1.d. Explain limit cycle oscillation.
(5 marks)
00
2.a. Write design steps of FIR filter using window technique. Compare window.
(10 marks)
00
2.b. Explain VLIW architecture in details.
(10 marks)
00
3.a. Explain Gibbs phenomenon in details.
(10 marks)
00
3.b Explain different addressing mode of TMS 320C67XX DSP processor.
(10 marks)
00
4.a. Design a linear phase FIR high pass filter using hamming window, with a cutoff frequency, $w_c= 0.8 \pi$ rad/sample N = 7.
(10 marks)
00
4.b.
(10 marks)
00
5.a. Find the DFT of the following sequence using DIT-FFT ,X{n} = {1,1,1,1,1,1,0,0,}
(10 marks)
00
5.b. Justify many to one mapping in s-plane to z-plane in impulse invariance method.
(10 marks)
00
6.a.
Compare IIR and FIR filters.
(5 marks)
00
6.b.
Proof parseval's theorem for the sequence X[n]={1,2,1,0}
(5 marks)
00
6.c.
Explain frequency wrapping in FIR filter.
(5 marks)
00
6.d.
Explain silent feature of TMS320C67XX DSP processor.
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