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Digital signal processing Question Paper - Dec 16 - Electronics Engineering (Semester 7) - Mumbai University (MU)

## Digital signal processing - Dec 16

### Electronics Engineering (Semester 7)

Total marks: 80

Total time: 3 Hours
INSTRUCTIONS

(1) Question 1 is compulsory.

(2) Attempt any **three** from the remaining questions.

(3) Draw neat diagrams wherever necessary.

**Q.1] Answer any four questions**

**1.a.**Differentiate between Butterworth and chebyshev filter

**1.b.**Explain the concept of pipelining in DSP processor

**1.c.**Explain frequency warping effect in designing IIR filter using BLT method.

**1.d.**Explain Quantization effect in computation of DFT

**1.e.**State the relationship between DFS, DFT and Z Transform

**2.a.**Compute IDFT of the following sequence using inverse FFT algorithm.

$ x(k)=\{3,0,3,0,3,0,3,0\} $

**2.b.**Prove the Parseval's theorem for the sequence $x(n)=\{2,4,2,4\}$

**2.c.**Find the circular convolution of the sequences $x(n)=\{1,2,1,2\}$ and $h(n)=\{4,0,4,0\}$

**3.a.**Design an analog Butterworth filter that has $-2 \mathrm{dB}$ passband attenuation at frequency of 20 rad/sec and atleast $-10 \mathrm{dB}$ stopband attenuation at $30 \mathrm{rad} / \mathrm{sec} .$

**3.b.**Convert the following filters with system functions

(i) $H(s)=\frac{1}{(s+2)(s+0.6)}$

(ii) $H(s)=\frac{(s+0.1)}{(s+0.1)^{2}+9}$

into a digital filter by means of impulse invariant and BLT method.

**4.a.**Explain the concept of linear phase in FIR filter. prove the following statement 'a filter is said to have linear phase response if its phase response is $\theta(w)=-\alpha w$

**4.b.**Design a low pass FIR filter with 7 coefficients for the following specifications passband frequency $=0.25 \mathrm{khz}$ and sampling frequency $=1 \mathrm{khz} .$ Use hamming window in designing.

**5.a.**Draw neat architecture of TMS 320C67xx DSP processor and explain each block.

**5.b.**Explain addressing modes of DSP processor with example.

**Q6] Write short notes on (any three)**

**6.a.**

**6.b.**Application of DSP processor to Radar signal processing

**6.c.**Limit cycle oscillations

**6.d.**Product quantization error and input error

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