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Electronic Devices and Circuits 1 Question Paper - May 19 - Electronics And Telecomm (Semester 3) - Mumbai University (MU)
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Electronic Devices and Circuits 1 - May 19

Electronics And Telecomm (Semester 3)

Total marks: 80
Total time: 3 Hours
INSTRUCTIONS
(1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Draw neat diagrams wherever necessary.

1. Attempt any 4 questions.

1.a. Explain bleeder resistor and critical inductance.
(5 marks) 00

1(b) Explain zero temperature drift biasing.
(5 marks) 2032

1(c) Explain effect of bypass capacitor and coupling capacitors on frequency response of amplifier
(5 marks) 3610

1(d) Draw and explain high frequency model of BJT for CE configuration.
(5 marks) 3608

1(e) Draw and explain small signal model of FET.
(5 marks) 00

2(a) Design single stage $R C$ coupled $\mathrm{CS}$ amplifier using self-bias method to meet following specifications: $|A v|=18, V o=2.5 \mathrm{Vrms},$ fors $=7 \mathrm{mA}, g_{m o}=5600 \mu \mathrm{s},$ $V p=2.5 \mathrm{V}, r_d = {50} \mathrm{k} \Omega .$
(15 marks) 00

2(b) Calculate $A v, Z i$ and $Z o$ for the circuit designed in $Q .2(a)$
(5 marks) 00

3(a) A full wave rectifier using a centre tapped transformer with two diodes gives output of $250 \mathrm{V}$ and current is $100+/-25 \mathrm{mA}$. If the ripple factor is 0.001 . Calculate the specification of the devices and components required if the filter used is $L C$ filter.
(12 marks) 3528

3(b) Explain the basic fabrication steps of passive elements.
(8 marks) 3770

4(a) What is biasing? What is the need of biasing? Derive the expression for stability factor of collector to base bias circuit.
(10 marks) 00

4(b) Calculate Q -point $\left(I_{C Q} \& V_{C E Q}\right)$ and stability factor (S) for the circuit shown in Fig. 4(b)

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(10 marks) 00

5(a) Derive the expressions for $A i, A v, Z i, Z o$ for $\mathrm{CE}$ amplifier with unbypassed $R_{E}$
(15 marks) 00

5(b) State and explain Miller's Theorem.
(5 marks) 3609

6(a) Sketch the frequency response for the circuit shown Fig. $6(a)$ where $C_{1}=0.5 \mu F, C_{2}=1 \mu \mathrm{F}, C_{S}=10 \mu \mathrm{F}, C_{g s}=5 \mathrm{pF}, C_{g d}=2 \mathrm{pF}, C_{d s}=3 \mathrm{pF}$ Take $I_{D}=3 \mathrm{mA} .$

enter image description here

(15 marks) 00

6(b) Write a short note on small signal model of diode.
(5 marks) 1721

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