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Design mealy sequence detector to detect a sequence ----1101---- using D filpflop and logic

Mumbai University > ELECTRO > Sem 3 > Digital Circuits and Designs

Marks: 10M

Year: May 2014

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figure 10 the state assignments and state table is wrong hence the circuit too..

Yes S2 should 10....you have substituted 11

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  • A sequence detector is a sequential state machine. In a Mealy machine, output depends on the present state and the external input (x). Hence in the diagram, the output is written outside the states, along with inputs. The state diagram of a Mealy machine for a 1101 detector is:

enter image description here

  • The state table for the above diagram:

enter image description here

  • State assignments: Let $S_0$ = 00

$S_1$ = 01

$S_2$ = 10

$S_3$ = 11

The above state table becomes:

enter image description here

  • Four states will require two flip flops. Consider two D flip flops. Their excitation table is shown below.

  • Excitation table:

enter image description here

  • K-maps to determine inputs to D Flip flop:

enter image description here

  • Circuit diagram for the sequence detector:

enter image description here

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can u please tell the verilog code that can be run on xilinx software as well

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