Question: Design mealy sequence detector to detect a sequence ----1101---- using D filpflop and logic
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Mumbai University > ELECTRO > Sem 3 > Digital Circuits and Designs

Marks: 10M

Year: May 2014

 modified 9 months ago by Abhishek Tiwari ♦♦ 50 written 3.3 years ago by Pooja Joshi • 740
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• A sequence detector is a sequential state machine. In a Mealy machine, output depends on the present state and the external input (x). Hence in the diagram, the output is written outside the states, along with inputs. The state diagram of a Mealy machine for a 1101 detector is:

• The state table for the above diagram:

• State assignments: Let $S_0$ = 00

$S_1$ = 01

$S_2$ = 10

$S_3$ = 11

The above state table becomes:

• Four states will require two flip flops. Consider two D flip flops. Their excitation table is shown below.

• Excitation table:

• K-maps to determine inputs to D Flip flop:

• Circuit diagram for the sequence detector:

 written 3.3 years ago by Pooja Joshi • 740

can u please tell the verilog code that can be run on xilinx software as well

 written 2.8 years ago by
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figure 10 the state assignments and state table is wrong hence the circuit too..

 written 2.3 years ago by

Yes S2 should 10....you have substituted 11