User: dukare030296hemant

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Posts by dukare030296hemant

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Answer: A: Explain High Frequency analysis of CS Stage
... ![enter image description here][1] Using Miller's theoram, $C_{GS}$ can be shifted to input and output side. Modified circuit using Miller's theoram, ![enter image description here][2] Input => Total capacitance seen from (X) to ground, $\hspace{1cm}=C_{GS}+(1-A_v)C_{GD}\hspac ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Explain Source degeneration.
... **For MOSFET in saturation,** $\hspace{2cm}I_D=\frac{1}{2}\mu_n C_{OX}\frac{W}{L}(V_{GS}-V_{th})^2$ where, $(V_{GS}-V_{th})$ -> $I_D$ dependant on square of overdrive voltage. - In some applications, square law dependence of $I_D$ on overdrive voltage introduces excessive non-linear ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Single ended signaling & differential ended signalling
... i) An important advantage of differential signalling over single ended signalling is higher immunity to environmental noise. ii) Consider fig:(a) Clock line- carries a large clock signal. Signal line- carries small sensitive signal. Due to capacitive coupling between two ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Explain PLL Topology
... i) A PLL consists of a PD ( Phase detector) and a VCO (Voltage controlled Oscillator) in a feedback loop. ii) PD compares phase of $V_{out}$ and $V_{in}$ generating an error that varies the VCO frequency untill the phases are aligned. i.e loop is locked. ![enter image descriptio ...
written 11 months ago by dukare030296hemant60
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Answer: A: Short note on SC Amplifier (Non-inv amp)
... ![enter image description here][1] i) **Sampling mode:** $S_1$ and $S_3$ -> ON and $S_2$ -> OFF , creating virtual ground at X and allowing voltage across $C_1$ to track iput voltage. ii)**Amplification mode:** $S_2$ -> ON, injects a constant charge $\Delta q_2$ onto node X. i ...
written 11 months ago by dukare030296hemant60
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Answer: A: Differential pair with MOS load
... **Differential Pair with MOS load** ![enter image description here][1] $A_v=-g_{m_{N}}\Big( \frac{1}{g_{m_{P}}} || r_{o_{N}} || r_{o_{p}} \Big)$ $ \hspace{0.6cm}\approx \frac{-g_{m_{N}}}{g_{m_{P}}} $ $ \hspace{0.6cm}\approx -\sqrt{\frac{\mu_n (W/L)_N}{\mu_p (W/L)_P}}$ $A_v=- g_ ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Voltage gain of differential pair
... **Voltage gain of differential pair.** Since, current source - increase resistance, we simplify differebtial pair in fig(a). ![enter image description here][1] Using superposition theorem, **(1)** Consider $V_{in_{1}}$ active and $V_{in_{2}}=0$, obtain $V_x\,\,and\,\,\,V_y$ - To ob ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Qualitative Analysis of diff. pair
... **Qualitative analysis of basic differential pair:** - Assume $V_{in_{1}}-V_{in_{2}}$ varies from $-\infty \,\, to + \infty$ ![enter image description here][1] **Fig:Diffrential mode characteristics(DM behaviour)** - $V_{in}$ is more -ve than $V_{in_{2}},\,M_1$ - OFF & $M_2$- ON ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Explain need of compensation and the compensation of 2 stage operational amplifi
... **a) Need of compensation:** i) Typically op-amp circuit contains many poles. For example, in folded cascade topology, folded node and output node both contribute poles. For this reason, the op-amp must be compensated i.e their open loop TF must be modified such that the closed loop ci ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250
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Answer: A: Explain Gain & phase margin condition while designing operational amplfiers
... **Gain and Phase conditions while designing op-amp.** ![enter image description here][1] $A_{CL}=\frac{A_{(S)}}{1+A_{(S)}\beta_{(S)}} ,\hspace{2cm}$ loop gain=$-A_{(S)}\beta_{(S)}$ Suppose above system has 2 poles $P_1$ and $P_2$, the Bode plot for mag & phase will have nature ...
written 11 months ago by dukare030296hemant60 • updated 11 months ago by Sanket Shingote ♦♦ 250

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