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Explain in details Virtual Memory, Segmentation and Paging.

Mumbai University > Information Technology > Sem 4 > Computer organization and Architecture

Marks: 8M

Year: May 2015

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Virtual Memory:

  • In the most computer system, the physical main memory is not as large as address space of the processor.
  • When we try to run a program, if it do not completely fit into the main memory the parts of its currently being executed are stored in main memory and remaining portion is stored in secondary storage device such as HDD.
  • When a new part of program is to be brought into main memory for execution and if the memory is full, it must replace another part which is already is in main memory.
  • As this secondary memory is not actually part of system memory, so for CPU, secondary memory is Virtual Memory.
  • Techniques that automatically more program and data blocks into physical memory when they are required for execution are called virtual memory
  • Virtual Memory is used to logically extend the size of main memory.
  • When Virtual Memory is used, the address field is virtual address.
  • A special hardware unit knows as MMU translates Virtual Address into Physical Address.

Memory Management Unit

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  • Address Translation is done by two techniques
    • Paging
    • Segmentation

1.Paging:

  • Physical memory is divided into fixed size block know as Frames.
  • Logical Memory is divided into blocks of same size knows as Pages.
  • When a process is to be executed, its pages are loaded into available memory - -- Paging Hardware :

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Physical Memory

Page Table (Base Register)

  • Every address generated by CPU is divided into two parts :
    • Page Number (P)
    • Displacement/Offset (d)
  • The page number is used as index into a page table from page table contains base address (f) of each page in physical memory.
  • This base address (f) is combined with the page offset (d) to define the physical memory address.

Paging Model of Logical & Physical Memory:

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Disadvantages:

  • This approach slow down the memory access by faster of 2.
  • So the solution to this problem is to use special small fast cache know as translation Look Aside Buffer (TLB)

Paging Hardware with TLB:

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  • The TLB contains only few of page table entries.
  • When logical address is generated by CPU its page number is used to index the TLB.
  • If page number is found, frame number is obtained and we can access memory and is a TLB Hit.
  • If page is not in TLB, then it is TLB miss and Reference is masked to page task.
  • If TLB is already FULL of entries, then Operating System must select Replacement Policy.
  • If the required page is not in main memory, the page must be brought from secondary to main memory.

2.Segmentation:

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  • The mapping is done with help of segment table. Each entry of segment table has base and limits.
  • The segment base contains starting physical address where resides in memory whereas limit specifies length of the segments.
  • The segment number is used as index for segment table.
  • The offset must be between O and limits.
  • If it is not less than limit then it is trapped (addressing the error).
  • If it is less than limit, then add it to segment base to produce address in physical memory.
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