Mumbai University > Computer Engineering > Sem 5 > Microprocessor

Marks: 5M

Year: May 2016

1. The Super SPARC processor contain floating-point units that can perform double precision multiply and add operations at the same rate as single precision.
2. Super SPARC defines 32 floating-point registers.
3. SuperSPARC V8 defines these as single precision registers.
4. For 64-bit operations, the registers pair up, so there are only 16 double precision floating-point registers.
5. Super SPARC V8plus and V9 define all the registers to be capable of operating in single, double, or a SPARC V8-compatible paired mode.
6. We get 32 double precision registers in SuperSPARC V9 mode.
7. Full-speed, 64-bit, floating-point arithmetic has been available since Super SPARC shipped in 1992.
8. A full set of 64-bit floating-point registers is available in V8 plus mode on Ultra SPARC.