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Enlist the instruction pairing rules for U and V pipeline in Pentium.
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The Pentium processor can issue one or two instructions every clock In order to issue two instructions simultaneously they must satisfy the following conditions :

  1. Both instructions in the pair must be "simples” instructions.

    Simple instructions are entirely hardwired; they do not require any microcode control and, in general, execute in one clock. Examples of simple instructions are register-to-register MOVs, INC, DEC and near conditional jumps(JZ, JNZ, etc.). There is one more restriction to conditional jump instruction; it must be the second instruction in the pair. The arithmetic and logical instructions are also simple instructions; however, they may take two or three clock cycles because these instructions use both register and memory operands. Sequencing hardware is used to allow them to function as simple instructions. The following integer instructions are considered simple and may be paired:

    • MOV reg, reg/mem/imm
    • MOV mem, reg/imm
    • ALU reg, reg/mem/imm
    • ALU mem, reg/imm
    • INC reg/mem
    • DEC reg/mem
    • PUSH reg/mem
    • POP reg
    • LEA reg, mem
    • JMP/CALL/JCC near
    • NOP
  2. Shifts or rotates can only pair in the U pipe.

    (SHL, SHR, SAL, SAR, ROL, ROR, RCL or RCR)

  3. ADC and 511B can only pair in the U pipe.
  4. JMP, CALL and Jcc can only pair in the V pipe. arc = jump on condition code).
  5. Neither instruction can contain BOTH a displacement and an immediate operand.
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