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Explain how the flushing of pipeline problem is minimized in Pentium architecture.
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written 9.0 years ago by
meghalikalyankar
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- Performance gain through pipelining can be reduced by the presence of program transfer instructions (such as JMP, CALL, RET and conditional jumps).
- They change the sequence causing all the instructions that entered the pipeline after program transfer instruction invalid.
- Suppose instruction I3 is a conditional jump to I50 at some …
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