Distinguish between Cortex-M3 and M4 architecture and explain briefly the interrupt structure of M3 architecture.

Mumbai University > Electronics Engineering > Sem 7 > Embedded System Design

Marks: 8 Marks

Year: May 2015

1 Answer
Cortex M3 Cortex M4
Cortex M3 is a microcontroller profiled ARM core Cortex M4 is also a microcontroller profiled ARM core with DSP capabilities
Cortex M3 provides instruction sets of,ARM 32 bit type, Thumb 16 bit and Thumb 2 Cortex M4 also provides instruction sets of ARM 32 bit type, Thumb 16 bit and Thumb 2. But it also includes range of saturating and SIMD instructions specifically optimized to handle DSP algorithms.
Cortex M3 does not have a floating point unit Cortex M4 provides an optional floating point unit and in such cases the cores are denoted as M4F.
DSP computation on Cortex M3 may need up to three times the power required on Cortex M4. Cortex M4 is enabled for DSP computations. Hence the power management is designed keeping in mind the power consumption for DSP computation

Interrupt structure of Cortex M3:

  1. The number of interrupt inputs on a Cortex-M3 microcontroller depends on the individual design.
  2. Interrupts generated by peripherals, except System Tick Timer, are also connected to the interrupt input signals.
  3. The typical number of interrupt inputs is 16 or 32. However, some microcontroller designs have more (or fewer) interrupt inputs.
  4. Besides the interrupt inputs, there is also a non-maskable interrupt (NMI) input signal. The actual use of NMI depends on the design of the microcontroller or system-on-chip (SoC) product.
  5. In most cases, the NMI could be connected to a watchdog timer or a voltage-monitoring block that warns the processor when the voltage drops below a certain level.
Please log in to add an answer.