Following are the prominent features of Cortex M3:
- Many instructions, including multiply, are single cycle. Therefore, the Cortex-M3 processor outperforms most microcontroller products.
- Separate data and instruction buses allow simultaneous data and instruction accesses to be performed.
- The Thumb-2 instruction set feature requires no state switching between the ARM 32 bit mode and THUMB 16 bit mode. This saves a lot of instruction cycle. Also many data operations can be clubbed in THUMB mode. Hence this feature helps in achieving higher code density which reduces the memory requirements.
- Instruction fetches are 32 bits. Up to two instructions can be fetched in one cycle. As a result, there’s more available bandwidth for data transfer.
- The Cortex-M3 design allows microcontroller products to operate at high clock frequency (over 100 MHz in modern semiconductor manufacturing processes).
Advanced Interrupt-Handling Features:
- The built-in NVIC (Nested vectored interrupt controller) supports up to 240 external interrupt inputs. The vectored interrupt (Interrupts with ISR address defined) feature considerably reduces interrupt latency because there is no need to use software to determine which IRQ handler to serve.
- The Cortex-M3 processor automatically pushes registers R0–R3, R12, Link register (LR), PSR, and PC in the stack at interrupt entry and pops them back at interrupt exit. This reduces interrupt handling latency.
- Interrupt priorities can be set and changed dynamically.
- Some of the multi cycle operations, including Load-Multiple (LDM), Store-Multiple (STM), PUSH, and POP, are now interruptible.
- NMIs are handled immediately as they are very important in safety critical systems.
Low Power Consumption: The Cortex-M3 processor is suitable for various low-power applications:
- The Cortex-M3 processor is suitable for low-power designs because of the low gate count.
- It has power-saving mode support (SLEEPING and SLEEPDEEP).
System Features: The Cortex-M3 processor provides various system features making it suitable for a large number of applications:
- The system provides bit-band operation, byte-invariant big endian mode, and unaligned data access support.
- Advanced fault-handling features include various exception types and fault status registers, making it easier to locate problems.
Debug Supports: Following are the debug supports available in Cortex M3 processor
- Supports JTAG or Serial-Wire debug interfaces
- CoreSight debugging solution allows the processor status or memory contents to be accessed even when the processor is running.
- Built-in support for six breakpoints and four watch points.
- New debugging features, including fault status registers, new fault exceptions, and Flash Patch operations, make debugging much easier