Mumbai University > Electronics and Telecommunication Engineering > Sem 3 > Digital Electronics

Marks: 10M

Year: May 2016

The binary data in a register can be moved within the register from one flip-flop to another. The registers that allow such data transfers are called as shift registers. There are four mode of operation of a shift register.

• Serial Input Serial Output

• Serial Input Parallel Output

• Parallel Input Serial Output

• Parallel Input Parallel Output

Serial Input Serial Output:

Let all the flip-flop be initially in the reset condition i.e. Q3 = Q2 = Q1 = Q0 = 0. If we entry of a four bit binary number 1111 into the register. When this is to be done, this number should be applied to ${D_in}$bit by with the LSB bit applied first. The D input of FF-3 i.e. ${D_3}$ is connected to serial data input ${D_in}$. Output of FF-3 i.e. ${Q_3}$ is connected to the input of the next flip-flop i.e. ${D_2}$ and so on.

Block Diagram:

Operation:

Before application of clock signal let ${Q_3} = {Q_2} = {Q_1} = {Q_0} = 0000$ and apply LSB bit of the number to be entered to ${D_in}$. So ${D_{in}} = {D_3} = 1$. Apply the clock. On the first falling edge of clock, the FF-3 is set, and stored word in the register is ${Q_3} = {Q_2} = {Q_1} = {Q_0} = 1000$

Apply the next bit to ${D_in}$. So ${D_in}=1$. As soon as the next negative edge of the clock hits, FF-2 will set and the stored word change to ${Q_3} = {Q_2} = {Q_1} = {Q_0} = 1100$

Apply the next bit to be stored i.e. 1 to ${D_{in}}$. Apply the clock pulse. As soon as the third negative clock edge hits, FF-1 will be set and output will be modified to ${Q_3} = {Q_2} = {Q_1} = {Q_0} = 1110$.

Similarly with ${D_{in}}$=1$ and with the fourth negative clock edge arriving, the stored word in the register is ${Q_3} = {Q_2} = {Q_1} = {Q_0} = 1111$.