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What are various programming techniques used for EEPROM

Subject: Basic VLSI Design

Topic: Semiconductor Memories

Difficulty: Medium

bvlsi(46) • 1.0k  views
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• EEPROM (Electrically Erasable Programmable ROM) offer users excellent capabilities and performance. Only one external power supply is required since the high voltage for program/erase is internally generated. Write and erase operations are performed on a byte per byte basis.
• The following explanation of EPROM floating gate transistor characteristic theory also applies to EEPROM and flash devices. Figures (a) and (b) show the cross section of a conventional MOS transistor and a floating gate transistor, respectively.
• The upper gate in Figure (b) is the control gate and the lower gate, completely isolated within the gate oxide, is the floating gate. • CFG and CFS are the capacitances between the floating gate and the control gate and substrate, respectively. VG and VF are the voltages of the control gate and the floating gate, respectively. -QF is the charge in the floating gate. (As electrons have a negative charge, a negative sign was added). In an equilibrium state, the sum of the charges equals zero. • VTC is the threshold voltage of the conventional transistor, and VTCG is the threshold voltage of the floating gate transistor. • The threshold voltage of the floating gate transistor (VTCG) will be VTO (around 1V) plus a term depending on the charge trapped in the floating gate.

• If no electrons are in the floating gate, then VTCG = VTO (around 1V). If electrons have been trapped in the floating gate, then VTCG = VTO -QF/CG (around 8V for a 5V part).
• This voltage is process and design dependent.
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