Subject: Basic VLSI Design

Topic: Data Path Design

Difficulty: Low

Ripple carry adder

• Succinctly, a ripple carry adder passes its carry bit through a long logic chain, which is very straightforward to design, but can have a very large delay.
• A ripple carry adder is implemented purely with a half-adder and multiple full adders. The maximum delay is through the carry signal path from the LSB to the MSB which "ripples" through all the adders.

Carry look ahead adder

• A carry-lookahead adder uses a clever algorithm to cut that logic to only a few layers, and thus keeps the delay pretty short even for a worst-case situation.
• A carry look-ahead adder includes additional logic which decodes the inputs directly to determine the carry output of a group of the adders. This special decoding provides an alternate and faster path for the carry information. There are various ways of implementing the carry function. Thus, carry-look ahead adder is more efficient than ripple carry adder in terms of performance.